4/5
A real quick introduction into all features of Coherence v3.7 in-memory grid. Useful for developer and architect audiences with all backgrounds who may or maynot have worked with caching technologies.
http://bit.ly/1gPXhDM
Showing posts with label Computer Organization and Architecture. Show all posts
Showing posts with label Computer Organization and Architecture. Show all posts
Sunday, March 30, 2014
Sunday, July 14, 2013
"Java Performance - Charlie Hunt Video Training"
5/5
Pranaam!! A valuable sneak-peak, a concise presentation on Java 1.7 performance tuning, with all important GC tuning options. The course is good to reinforce Oracle Performance Tuning training or for professional performance tuners to get a refresher. Each Garbage Collection type is explained with examples from verbose GC logs. The explanation is more on what are GCs, the what to performance tune is specific to context and is rightly not a black & white answer for the audience.
The G1 garbage introduced since later versions of 1.6 is interesting and I'd like to more about this.
The sections are divided around 3 topics. Something tells me that part of this training is about to arrive with details on G1 garbage collector or improvements in concurrency in existing GC types.
- JVM Overview
- Collecting Performance Statistics
- Understand HotSpot JVM GC Logs
Sudeep Namboodiri
"Learning VMware ESXi and vSphere 5.1 Administration" by Glen Martin

4/5
"Learning VMware ESXi and vSphere 5.1 Administration by Glen Martin"
Very good hands-on training on ESXi related administration, useful for everyone including Solution Architects and System Integration Architects apart from system administrators to understand VMware's virtualization tools. The training covered fundamental working knowledge on below areas:
You can look at topic index for more details
- vCenter, vSphere, ESXi topology
- ESXi installation, vCenter installation
- Virtual Storage fundamentals
- Virtual Network fundamentals
- Creating a Virtual Machine
- DRS
- HA
- vMotion
- Storage vMotion
- Performance tuning
- vCenter Update Manager fundamentals and installation
- VMware Update Manager
- Data protection and security
Regards
Sudeep
Sunday, April 21, 2013
"Java 7 Concurrency Cookbook" by Javier Fernández

Parallel processing and optimized high performance computing are interesting subjects that can solve large compute problems .It's essential to solve a problem quickly and make result available for the next set of actions. Sometimes its necessary to know which areas in a compute solutions are to be parallelized and which shouldn't be. It's an intriguing subject. The next area for me would be researching Design Patterns in concurrency. But before I get to that, creating a running log of areas covered from this book.
- Thread Management
- Creating & Running threads
- Get thread information
- Interrupt threads
- Control Interruption of threads
- Sleeping and Resuming threads
- Waiting for Finalization of threads
- Creating and running Daemon threads
- Processing uncontrolled Exceptions in threads
- Using ThreadLocal variables
- Grouping threads into a group
- Processing unchecked exceptions in ThreadGroup
- Using factory pattern to create Thread
- Basic Thread Synchronization
- Synchronizing a method
- Arranging independent attributes in synchronized blocks using Object references
- Using conditions in synchronized code block
- Using Lock to synchronize a code block
- Synchronizing data read/write operations using Lock
- Lock fairness
- Using multiple conditions in Lock
- Thread Synchronization utilities
Monday, January 21, 2013
"Algorithms in a nutshell" - Part 1
I'm revisiting materials on Algorithms and finding below book very useful.
The first 2 chapters are very impressive in setting a base, actively working through the rest of book.
A "problem" can be defined as collection of data processed by the program to create a solution for the data. Though its difficult to establish a standard problem
definition for real world scenarios, its can help if data inputs & data properties (encoding) are well understood.
When choosing an algorithm using abstraction on rate of growth, ex. evaluating a value in an set of number, the estimated average evaluations needed can be formulated
mathematically. Typically for high growth rate problems, the constants in formulation can be ignored. But care needs to be taken for scenarios like small growth or small number set,
as algorithm application changes. As a principle, the choice for algorithm depends on type of problem and distribution of elements in problem. There is no optimal algorithm for
problem of a given nature.
Methodology for choosing an algorithm:
Perform 3 case analysis viz. worst-case, average-case and best-case
The performance families in terms of decreasing efficiency are viz.
constant O(n)
logarithmic
sublinear
linear = eg. addition
nlog(n)
quadratic eg. multiplication
exponential
The author did lose me during the mathematical analysis and formulation of Big O notations for each member of performance family. Its a to do to check the reference section and build skills sets in those.
The graphical patterns of performance family definitely gives a visual clue as what type of operation is the algorithm using. very nice.
A side note about distribution:
binary tree distribution: works well during search when items are equally or roughly equally distributed(red-black tree) in a binary tree
ordered distribution : n/2 items need be compared on an average to search for an item
Sunday, September 11, 2011
Internal Memory
Internal Memory i.e semiconductor memory is one of the most important part of computer system. Its also an area which can significantly impact performance, layout of chip and architecture of a high perfomant system. Noting the key points on Internal Memory:
DRAM (Dynamic RAM) :
Used a main memory
SRAM(Static RAM):
Used as internal cache or on-chip memory
Types of ROM:
PROM
EPROM
EEPROM (the used in microcontrollers, embedded in devices)
Flash Memory
Advacanced DRAM:
Synchronous DRAM
Rambus DRAM
DDR DRAM
Cache DRAM
Error correction techniques and code:
Hamming code
SEC-DEC as used in DDR DRAM
The internal module orginazation and layout of memory banks changes based on type of internal memory used,
DRAM (Dynamic RAM) :
Used a main memory
SRAM(Static RAM):
Used as internal cache or on-chip memory
Types of ROM:
PROM
EPROM
EEPROM (the used in microcontrollers, embedded in devices)
Flash Memory
Advacanced DRAM:
Synchronous DRAM
Rambus DRAM
DDR DRAM
Cache DRAM
Error correction techniques and code:
Hamming code
SEC-DEC as used in DDR DRAM
The internal module orginazation and layout of memory banks changes based on type of internal memory used,
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